Schematic of RP Front End

[john k2ox]

The ADC on our open source RP has 750 MHz of analog bandwidth. What that means is that it is capable of sub-sampling signals up to 750 MHz. That's a lot more capability than the 50 MHz single shot BW we are stuck with.

I'm quite sure RP has a 50 MHz or so anti alias filter, but I don't have a schematic. Taking a close look at the board it appears there are two paths into each ADCs. One path goes to the SMA input connector and a second (differential?) path is on the board, but doesn't have any components. I want to use that input.

How about releasing a circuit diagram of the input?

Regards,
John

[Nils Roos]

I whole-heartedly second that idea.
Me and other users I talked with were wondering for some time already why the schematics have not been made public.

With respect to the unpopulated channels on the PCB, I think what you are referring to are the unused negative lines of the differential output paths. The input amplification stage seems to connect to the ADC with differential lines already.