RP Reset Button

[john k2ox]

For those who want a reset button, I did some reverse engineering and it is very simple to implement. That's in spite of 'RS Components Ltd and Allied Electronics' selfish policy . It sure would be nice to have a schematic for my open source RP.

Maybe we should file a law suite against the creators.

Anyway, as it turns out, test point 3 (tp3) is connected to the zynq's 'PS_SRST_B' pin. Just add a push button to pull it low. It is located under the sata serial connectors.

It sure beats pulling the power after every PL load.

Regards,
john

[Nils Roos]

Anyway, as it turns out, test point 3 (tp3) is connected to the zynq's 'PS_SRST_B' pin. Just add a push button to pull it low. It is located under the sata serial connectors.

Good to know, thanks for sharing.

It sure beats pulling the power after every PL load.

If you have console access, you could also just "reboot" the device. If not, the reset button will certainly come in handy.

[john k2ox]

I'm using JTAG to load the PL. When doing so all comms to the PS is lost. In the past I had to cycle the power. That's why I use the hardware reset. I also read the Xilinx debugger uses GPIO2 of the Ftdi chip to drive this reset.

Now you have me thinking. Is there a better way through software? I don't recall any of the flow examples I've read requiring a reset. Unfortunately, they are all based on the Digilent boards running bare metal.

Any thoughts?

john