FPGA Clock

[MPetrov]

Hi guys ! Sorry for stupid question, but which pin is input clock for FPGA ?

[Nils Roos]

I'm not sure what you mean. The FPGA does not have an accessible external clock input. The closest thing is the external ADC clock input on the expansion connector E2 pins 23+24. If you modify your Red Pitaya for external ADC clock input, that differential clock pair can be connected to the ADC, which in turn drives all logic clocks along the sample data path inside the FPGA.

All the ZYNQ's other internal clocks are generated by PLLs that are driven from the PS_CLK input at location E7. This clock input is driven from an external crystal oscillator of 33.3MHz.

[MPetrov]

Thanks

[MPetrov]

I found it ! If you don't want to use PS part of SoC, but only FPGA, then you can use U18 pin for input clock from oscillator (33,333MHz).