bare metal app
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bare metal app
Hello,
I would like to know how you can run a bare metal app on the red pitaya.
The goal is to use Core 0 for Linux and Core 1 for bare metal. Could someone help me?
Thanks,
Mike
I would like to know how you can run a bare metal app on the red pitaya.
The goal is to use Core 0 for Linux and Core 1 for bare metal. Could someone help me?
Thanks,
Mike
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- Posts: 799
- Joined: Sat May 23, 2015 5:22 pm
Re: bare metal app
Hi Mike,
Have you seen this article? I'd say that the instructions from this article could be adapted to RedPitaya.
Cheers,
Pavel
Have you seen this article? I'd say that the instructions from this article could be adapted to RedPitaya.
Cheers,
Pavel
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- Joined: Mon Jun 15, 2015 8:02 pm
Re: bare metal app
Hi,
thanks for the info.
unfortunately i dont have the linux kernel for rp. just look at the xilinx kernel on github?
so i need to add the zynq_remoteproc driver... and give linux e.g. only 500MB of the ram...
i think 2mb for the bare metal is ok to make a basic test.
how could i test the bare metal as simple as possible? is there a SDK project available which can be adapt for this test?
thanks for the info.
unfortunately i dont have the linux kernel for rp. just look at the xilinx kernel on github?
so i need to add the zynq_remoteproc driver... and give linux e.g. only 500MB of the ram...
i think 2mb for the bare metal is ok to make a basic test.
how could i test the bare metal as simple as possible? is there a SDK project available which can be adapt for this test?
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- Posts: 799
- Joined: Sat May 23, 2015 5:22 pm
Re: bare metal app
Hi Mike,
I've never played with the bare metal applications myself. I'm quite happy with Linux running on both cores.
However, I think that with the article from my previous comment and the Xilinx application notes 1078 and 1079 referenced in the article, a bare metal application for RedPitaya should be doable.
Purely out of curiosity, what are advantages of running a bare metal application on the second CPU core?
The Linux patches are in patches/linux-xlnx-xilinx-v2015.1.patch
The Linux source code will be copied by make to tmp/linux-xlnx-xilinx-v2015.1
I'm running these commands on my virtual development machine configured as described at the following link:
http://pavel-demin.github.io/red-pitaya ... t-machine/
http://www.wiki.xilinx.com/XAPP1078+Latest+Information
http://www.wiki.xilinx.com/file/view/xa ... 2014.4.zip
Cheers,
Pavel
I've never played with the bare metal applications myself. I'm quite happy with Linux running on both cores.
However, I think that with the article from my previous comment and the Xilinx application notes 1078 and 1079 referenced in the article, a bare metal application for RedPitaya should be doable.
Purely out of curiosity, what are advantages of running a bare metal application on the second CPU core?
Here is how I build the Linux kernel for the RedPitaya board:unfortunately i dont have the linux kernel for rp. just look at the xilinx kernel on github?
Code: Select all
source /opt/Xilinx/Vivado/2015.1/settings64.sh
source /opt/Xilinx/SDK/2015.1/settings64.sh
git clone https://github.com/pavel-demin/red-pitaya-notes
cd red-pitaya-notes
make NAME=red_pitaya_0_92 uImage
The Linux source code will be copied by make to tmp/linux-xlnx-xilinx-v2015.1
I'm running these commands on my virtual development machine configured as described at the following link:
http://pavel-demin.github.io/red-pitaya ... t-machine/
I'd say that blinking LED should be the simplest one. With the default RedPitaya FPGA configuration, just set and reset the third bit at the address 0x40000030 to blink the third LED on the board.how could i test the bare metal as simple as possible?
Have you looked at the design files provided with the Xilinx application notes 1078?is there a SDK project available which can be adapt for this test?
http://www.wiki.xilinx.com/XAPP1078+Latest+Information
http://www.wiki.xilinx.com/file/view/xa ... 2014.4.zip
Cheers,
Pavel
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- Posts: 23
- Joined: Mon Jun 15, 2015 8:02 pm
Re: bare metal app
thank you pavel for all this help!
the following blog adds a zynq_remoteproc driver: http://henryomd.blogspot.be/2015/02/zyn ... metal.html
i guess i dont need it at the beginning?
i started to read: http://www.xilinx.com/support/documenta ... -metal.pdf
Step 1:
give CPU0 (Linux) only 500MB RAM
modify the device tree: https://github.com/pavel-demin/red-pita ... tree.patch
Im not sure why you only use 480MB here: https://github.com/pavel-demin/red-pita ... pitaya.dts
Step 2:
Set the maximum number of CPUs to 1 by adding maxcpus=1 to the bootargs: https://github.com/pavel-demin/red-pita ... cetree.tcl ... will it know that it should use CPU0?
Step 4:
Build Linux Application RWMEM with SDK.
Step 5:
Build create app_cpu1.elf with SDK, which should access the fpga and blink the led.
I have 2 questions here:
- Where should I copy app_cpu1.elf ?
- Could I create app_cpu1.elf without the SDK?
Are there any other steps left out?
will i be able to access the BRAM of the FPGA from bare metal?
will i need to change the fpga code for bare metal?
the following blog adds a zynq_remoteproc driver: http://henryomd.blogspot.be/2015/02/zyn ... metal.html
i guess i dont need it at the beginning?
i started to read: http://www.xilinx.com/support/documenta ... -metal.pdf
Step 1:
give CPU0 (Linux) only 500MB RAM
modify the device tree: https://github.com/pavel-demin/red-pita ... tree.patch
Code: Select all
memory {
device_type = "memory";
reg = <0x00000000 1F400000>;
};
Step 2:
Set the maximum number of CPUs to 1 by adding maxcpus=1 to the bootargs: https://github.com/pavel-demin/red-pita ... cetree.tcl ... will it know that it should use CPU0?
Step 4:
Build Linux Application RWMEM with SDK.
Step 5:
Build create app_cpu1.elf with SDK, which should access the fpga and blink the led.
I have 2 questions here:
- Where should I copy app_cpu1.elf ?
- Could I create app_cpu1.elf without the SDK?
Are there any other steps left out?
will i be able to access the BRAM of the FPGA from bare metal?
will i need to change the fpga code for bare metal?
Last edited by Mike1010 on Mon Jun 15, 2015 10:03 pm, edited 1 time in total.
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Re: bare metal app
If the bare metal side uses the MMU you may need to create TLBs that target the bus address range where the FPGA resources reside. A simple 1:1 translation should suffice - basically the same is achieved by the mmap()ing of /dev/mem under linux. Short answer: yes.will i be able to access the BRAM of the FPGA from bare metal?
No.will i need to change the fpga code for bare metal?
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- Joined: Mon Jun 15, 2015 8:02 pm
Re: bare metal app
ok, i guess i should start with a simple hello world. what do you suggest? i need somthing small before i extend it further...
I not sure where to copy rwmem.elf and app_cpu1.elf and how to tell linux to start it with booting the kernel?
the application note also confuses with softUart.elf. ...softUart.elf simply and prints to the stdout of Linux?
I not sure where to copy rwmem.elf and app_cpu1.elf and how to tell linux to start it with booting the kernel?
the application note also confuses with softUart.elf. ...softUart.elf simply and prints to the stdout of Linux?
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- Joined: Sat May 23, 2015 5:22 pm
Re: bare metal app
Page 4 from XAPP1078:I not sure where to copy rwmem.elf and app_cpu1.elf and how to tell linux to start it with booting the kernel?
Pages 22-23 from XAPP1078:Within this AMP example’s project files, the FSBL has been modified to continue searching for
files and loading them into memory until it detects a file that has a load address of
0xFFFFFFF0. Upon detection, the FSBL downloads this last file and jumps to the executable
address of the first non-bit or non-boot file found (which is the application for CPU0).
So, I suppose that the answer is to include all the .elf files into BOOT.BIN.In this example, the FSBL has been modified to download more than one application so the second application ELF that runs on CPU1 is included in BOOT.BIN.
The commands to create BOOT.BIN can be found in my Makefile:
https://github.com/pavel-demin/red-pita ... kefile#L98
Code: Select all
echo "img:{[bootloader] tmp/red_pitaya_0_92.fsbl/executable.elf tmp/red_pitaya_0_92.bit tmp/u-boot.elf}" > tmp/boot.bif
bootgen -image tmp/boot.bif -w -o i boot.bin
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Re: bare metal app
rwmem and softUart only come into play once linux is up and running, so forget about them for the moment.Mike1010 wrote:I not sure where to copy rwmem.elf and app_cpu1.elf and how to tell linux to start it with booting the kernel?
The app_cpu1.elf will be bundled with the modified first stage boot loader (fsbl) and the u-boot boot loader into the file boot.bin.
The whole process is as follows:
- configure the SDK with the modified board support packages and fsbl source
- compile the modified fsbl - or use the supplied binary that comes with the app-note
- for the linux side: compile the u-boot boot loader, build the linux kernel, device tree and root file system, etc
- for the bare metal side: compile the app_cpu1.elf - this is where you put your own bare metal application
- use the bootgen utility to pack fsbl.elf, u-boot.elf, app_cpu1.elf and cpu1_bootvec.bin into a file named boot.bin
- put boot.bin into the root directory of your sdcard
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Re: bare metal app
This will have to be changed slightly to account for the modified fsbl:pavel wrote:Code: Select all
echo "img:{[bootloader] tmp/red_pitaya_0_92.fsbl/executable.elf tmp/red_pitaya_0_92.bit tmp/u-boot.elf}" > tmp/boot.bif bootgen -image tmp/boot.bif -w -o i boot.bin
Code: Select all
img: {[bootloader] fsbl.elf red_pitaya_top.bit u-boot.elf app_cpu1.elf [load = 0xFFFFFFF0] cpu1_bootvec.bin}
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