RP122.88-16 DAC problem

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ortariot
Posts: 2
Joined: Mon Jan 16, 2017 9:59 am

RP122.88-16 DAC problem

Post by ortariot » Thu Nov 19, 2020 3:59 pm

Hello!
For my hobby projects I learning zynq processor system.
I have RedPitaya board 122.88-16 model. For my task needs dac. I use axis_red_pitaya_dac_v2_0 ip core from Pavel Demin and this core works great with with my board when i send in data_in(s_axis_tdata) signal from generator or binary counter. On display my oscilloscope i see periodical signal. However when i send to data in constants from ip core or from gpio port i see on oscilloscope display one short pulse but I wont to see change output voltage level.

Also also i tried change verilog code of axis_red_pitaya_dac_v2_0 so that in out sends constant output level:

Code: Select all

//assign int_dat_a_wire = s_axis_tdata[DAC_DATA_WIDTH-1:0];
//assign int_dat_b_wire = s_axis_tdata[AXIS_TDATA_WIDTH/2+DAC_DATA_WIDTH-1:AXIS_TDATA_WIDTH/2];
  assign int_dat_a_wire = $signed(7000); // 14'b01111111111111
  assign int_dat_b_wire = $signed(5000); // 14'b01111111111111   
But the result is exactly the same as I described above - one short pulse.
Please tell me what possible problem there might be. Perhaps this is somehow related to ODDR?

pavel
Posts: 620
Joined: Sat May 23, 2015 5:22 pm

Re: RP122.88-16 DAC problem

Post by pavel » Thu Nov 19, 2020 6:25 pm

The 122.88-16 board have AC coupled inputs and outputs. DC signals are filtered out. So the 122.88-16 board can't be used to generate constant levels.

ortariot
Posts: 2
Joined: Mon Jan 16, 2017 9:59 am

Re: RP122.88-16 DAC problem

Post by ortariot » Sat Nov 21, 2020 8:15 pm

Thank you, I did not pay attention to it)) Although this is written everywhere, including the scheme shown.

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