Slow analog output DAC low voltage

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Joined: Thu Mar 31, 2022 4:06 pm

Slow analog output DAC low voltage

Post by davide.cryptalabs » Thu Mar 31, 2022 4:15 pm

I'm using the C API to set the analog output AO0 to 1.8V.
The API (rp_AOpinSetValue(0,1.8)) returns true but the output is actually 1.1V.
When I try to set a lower voltage: 0.9V on the output i get ~0.6V.
I've measured the AO0 pin with an oscilloscope.

Has anyone exeperienced this, in the documentation is clearly amrked that I can set it up to 1.8V.

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Location: Moenchengladbach, Germany

Re: Slow analog output DAC low voltage

Post by Kilroy » Tue Aug 02, 2022 11:14 am

Yes - same here.
But I am not using the latest FPGA nor the latest API.
I have seen there are have been made some changes and I will try to figure that out.

Posts: 16
Joined: Tue Nov 16, 2021 11:38 am

Re: Slow analog output DAC low voltage

Post by juretrn » Tue Aug 02, 2022 2:37 pm

I believe this was fixed in the latest release. We transitioned from PWM to PDM generation in the FPGA for these outputs, but we missed a parameter fix in the software.
But the latest release should now work correctly IIRC.

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