So far, I have wired my module to the system bus interface (removed the stub for sys and connected those pins to my module). Within my module, I have put together the following code, based upon what I found in other modules in the source code:
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process(clk_i) begin if(rising_edge(clk_i)) then if(rstn_i = '0') then err_o <= '0'; ack_o <= '0'; else err_o <= '0'; case (addr_i(19 downto 0)) is when "00000000000000000000" => ack_o <= wen_i OR ren_i; rdata_o <= "00000000" & MYDATA; ...other when statements end case; end if; end if; end process;
Edit: I have also tried a different approach - using the block diagram. However, I am still unsure how to connect the module. I am not married to direct RTL programming or using the BD, whatever works best. I've tried attaching a screenshot of the block diagram, but I got the message: "ERROR Sorry, the board attachment quota has been reached."