Passing parameters to FPGA

Applications, development tools, FPGA, C, WEB
Post Reply
josuedavila
Posts: 4
Joined: Fri Oct 09, 2015 3:06 am

Passing parameters to FPGA

Post by josuedavila » Wed Mar 30, 2016 11:02 pm

Hi,
I'm trying to add a digital filter at the output of the arbitrary signal generator in red pitaya. Currently my filter does something (but not what I expect).
To be able to debug it (and later on for normal operation) I need to pass parameters to the filter to control its behavior, but I'm not sure where to start. Do I write a C program that writes the parameters in some sector of memory? Is there an example that I can use to understand how this works? And, on the FPGA side, how do I tell my filter to read its parameters from a particular region of memory?
Any pointers to relevant information will help
Thanks a lot

Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Passing parameters to FPGA

Post by Nils Roos » Thu Mar 31, 2016 9:56 pm

Hi,

if you are adding the filter inside the ASG module (fpga/rtl/red_pitaya_asg.v), you can use the already existing mechanisms to pass parameters to the logic.

On the FPGA side you'd define new registers to hold your parameters (eg. here):

Code: Select all

[...]
reg [ 32-1: 0] set_a_rdly , set_b_rdly ;
reg [ 32-1: 0] set_a_myparameter , set_b_myparameter ; // add as many as you need
[...]
Then choose an unused address within the ASG range and create read and write logic to handle it (writing):

Code: Select all

[...]
      if (sys_addr[19:0]==20'h40)  set_b_rdly <= sys_wdata[  32-1: 0] ;
      if (sys_addr[19:0]==20'h100)  set_a_myparameter <= sys_wdata[  32-1: 0] ;
      if (sys_addr[19:0]==20'h104)  set_b_myparameter <= sys_wdata[  32-1: 0] ;
[...]
and (reading):

Code: Select all

[...]
     20'h00040 : begin sys_ack <= sys_en;          sys_rdata <= set_b_rdly                         ; end
     20'h00100 : begin sys_ack <= sys_en;          sys_rdata <= set_a_myparameter                  ; end
     20'h00104 : begin sys_ack <= sys_en;          sys_rdata <= set_b_myparameter                  ; end
[...]
The example parameters would be mapped to the addresses 0x40200100 and 0x40200104.

You can also take the oscilloscope as an example - it has the filter parameters "set_a_filt_.." and "set_b_filt_.." for its internal filters.

On the application side, you use a memory mapped pointer to access the new addresses. Examples can be found in the acquire and generate utilities, and this topic has also been discussed exhaustively in this forum.

Post Reply
jadalnie klasyczne ekskluzywne meble wypoczynkowe do salonu ekskluzywne meble tapicerowane ekskluzywne meble do sypialni ekskluzywne meble włoskie

Who is online

Users browsing this forum: No registered users and 3 guests