Redpitaya as OpenOCD interface adapter

Tell us how your experiment is running with Red Pitaya
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yggdrasil
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Joined: Thu Nov 12, 2020 9:27 pm

Redpitaya as OpenOCD interface adapter

Post by yggdrasil » Thu Nov 12, 2020 9:59 pm

Hello, I want to know if there are implementation on some VHDL allowing the redpitaya to interract with openOCD?

Some tools like busblaster are using CPLD todo this task, is there any solution allowing this kind of debuging adapter. ? Ding my duty I find out some solutions :

http://dangerousprototypes.com/docs/Bus ... ffer_logic
http://blog.thisisnotrocketscience.nl/p ... -hard-way/
https://opencores.org/projects/adv_debug_sys

Is there any easy way to make the repitaya a interface for openOCD? Maybe simulate JtagKey or FT232H ?

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